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5.0 kv rms, single-channel digital isolator data sheet adum210n rev. 0 document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2016 analog devices, inc. all rights reserved. technical support www.analog.com features high common-mode transient immunity: 100 kv/s high robustness to radiated and conducted noise low propagation delay 13 ns maximum for 5 v operation 15 ns maximum for 1.8 v operation 150 mbps maximum data rate safety and regulatory approvals (pending) ul recognition 5000 v rms for 1 minute per ul 1577 csa component acceptance notice 5a vde certificate of conformity din v vde v 0884-10 (vde v 0884-10):2006-12 v iorm = 849 v peak cqc certification per gb4943.1-2011 low dynamic power consumption 1.8 v to 5 v level translation high temperature operation: 125c maximum fail-safe high or low options 8-lead, rohs-compliant, soic_ic package applications general-purpose single-channel isolation industrial field bus isolation general description the adum210n 1 is a single-channel digital isolator based on analog devices, inc., i coupler? technology. combining high speed, complementary metal-oxide semiconductor (cmos) and monolithic air core transformer technology, this isolation component provides outstanding performance characteristics, superior to alternatives such as optocoupler devices and other integrated couplers. the maximum propagation delay is 13 ns with a pulse width distortion of less than 3 ns at 5 v operation. the adum210n supports data rates as high as 150 mbps with a withstand voltage rating of 5.0 kv rms (see the ordering guide). the device operates with the supply voltage on either side ranging from 1.8 v to 5 v, providing compatibility with lower voltage systems as well as enabling voltage translation functionality across the isolation barrier. unlike other optocoupler alternatives, dc correctness is ensured in the absence of input logic transitions. two different fail-safe options are available, in which the outputs transition to a pre- determined state when the input power supply is not applied or the inputs are disabled. functional block diagram e n c o d e d e c o d e v dd1 v i (data in) v dd1 gnd 1 v dd2 gnd 2 v o (data out) gnd 2 adum210n 8 7 6 5 1 2 3 4 13969-001 figure 1. 1 protected by u.s. patents 5,952,849; 6,873,065; 6, 903,578; and 7,075,329. other patents are pending.
adum210n data sheet rev. 0 | page 2 of 15 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? electrical characteristics5 v operation................................ 3 ? electrical characteristics3.3 v operation ............................ 4 ? electrical characteristics2.5 v operation ............................ 5 ? electrical characteristics1.8 v operation ............................ 6 ? insulation and safety related specifications ............................ 7 ? package characteristics ............................................................... 7 ? regulatory information ............................................................... 7 ? din v vde v 0884-10 (vde v 0884-10) insulation characteristics .............................................................................. 8 ? recommended operating conditions .......................................8 ? absolute maximum ratings ............................................................9 ? esd caution...................................................................................9 ? pin configuration and function descriptions ........................... 10 ? typical performance characteristics ........................................... 11 ? applications information .............................................................. 12 ? overview ..................................................................................... 12 ? pcb layout ................................................................................. 12 ? propagation delay related parameters ................................... 13 ? jitter measurement ..................................................................... 13 ? insulation lifetime ..................................................................... 13 ? outline dimensions ....................................................................... 15 ? ordering guide .......................................................................... 15 ? revision history 4/16revision 0: initial version
data sheet adum210n rev. 0 | page 3 of 15 specifications electrical characteristics5 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 5 v. minimum/maximum specifications apply over the entire recommended operation range of 4.5 v v dd1 5.5 v, 4.5 v v dd2 5.5 v, and ?40c t a +125c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. supply currents are specified with 50% duty cycle signals. table 1. parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pulse width distortion (pwd) limit data rate 150 mbps within pwd limit propagation delay t phl , t plh 4.8 7.2 13 ns 50% input to 50% output pulse width distortion pwd 0.5 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/c propagation delay skew t psk 6.0 ns between any two units at the same temperature, voltage, and load jitter 380 ps p-p see the jitter measurement section 55 ps rms see the jitter measurement section dc specifications input threshold logic high v ih 0.7 v dd1 v logic low v il 0.3 v dd1 v output voltage logic high v oh v dd2 ? 0.1 v dd2 v output load (i o ) = ?20 a, v i = v ih v dd2 ? 0.4 v dd2 ? 0.2 v i o = ?4 ma, v i = v ih logic low v ol 0.0 0.1 v i o = 20 a, v i = v il 0.2 0.4 v i o = 4 ma, v i = v il input current per channel i i ?10 +0.01 +10 a 0 v v i v dd1 quiescent supply current i dd1 (q) 0.9 1.4 ma v i = 0 (n0), 1 (n1) 1 i dd2 (q) 1.0 1.3 ma v i = 0 (n0), 1 (n1) 1 i dd1 (q) 3.6 6.0 ma v i = 1 (n0), 0 (n1) 1 i dd2 (q) 1.0 1.4 ma v i = 1 (n0), 0 (n1) 1 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs switching, 50% duty cycle dynamic output i ddo (d) 0.02 ma/mbps inputs switching, 50% duty cycle undervoltage lockout uvlo positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common-mode transient immunity 2 |cm h | 75 100 kv/s v i = v dd1 , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v i = 0 v, v cm = 1000 v, transient magnitude = 800 v 1 n0 indicates the adum210n0 models and n1 indicates the adum210n1 models. see the ordering guide. 2 |cm h | is the maximum common-mode vo ltage slew rate that can be sustained while maintaining the voltage output (v o ) > 0.8 v dd2 . |cm l | is the maximum common- mode voltage slew rate that can be sustained while maintaining v o > 0.8 v. the common-mode voltage slew rates apply to both the rising and falling common-mode voltage edges.
adum210n data sheet rev. 0 | page 4 of 15 table 2 . total supply current vs. data throughput 5 v operation 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current supply current side 1 i dd1 2.2 3. 7 2.5 3.9 3.6 4. 9 ma supply current side 2 i dd2 1.1 1.6 1. 6 2.3 3.1 4.6 ma electrical character istics 3.3 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 3.3 v. minimum/maximum specifications apply over the entire recommended operation range: 3.0 v v dd1 3.6 v, 3.0 v v dd2 3.6 v, and ? 40c t a + 125c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. supply curr ents are specified with 50% duty cycle signals. table 3 . parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pwd limit data rate 150 mbps within pwd limit propagation delay t phl , t plh 4.8 6.8 14 ns 50% input to 50% output pulse width distortion pwd 0.7 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/ c propagation delay skew t psk 7.0 ns between any two units at the same temperature, voltage, and load jitter 290 ps p -p s ee the jitter measurement section 45 ps rms s ee the jitter measurement section dc specifications input threshold logic high v ih 0.7 v dd1 v logic low v il 0.3 v dd1 v output voltage logic high v oh v dd2 ? 0.1 v dd2 v i o = ?20 a, v i = v ih v dd 2 ? 0.4 v dd 2 ? 0.2 v i o = ?2 ma, v i = v ih logic low v ol 0.0 0.1 v i o = 20 a, v i = v il 0.2 0.4 v i o = 2 ma, v i = v il input current per channel i i ?10 +0.01 +10 a 0 v v i v dd 1 quiescent supply current i dd 1 (q) 0.8 1.3 ma v i = 0 ( n0 ), 1 ( n1 ) 1 i dd 2 (q) 0.9 1.4 ma v i = 0 ( n0 ), 1 ( n1 ) 1 i dd 1 (q) 3.6 5.8 ma v i = 1 ( n0 ), 0 ( n1 ) 1 i dd 2 (q) 0.9 1.4 ma v i = 1 ( n0 ), 0 ( n1 ) 1 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs switching, 50% duty cycle dynamic output i ddo (d) 0.01 ma/mbps inputs switching, 50% duty cycle undervoltage lockout uvlo positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 2 |cm h | 75 100 kv/s v i = v dd1 , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v i = 0 v, v cm = 1000 v, transient magnitude = 800 v 1 n 0 indicates the adum210n0 model s and n1 indicates the adum210n1 models . see the ordering guide . 2 |cm h | is the maximum common - mode voltage slew rate that can be sustained while maintaining the voltage outp ut (v o ) > 0.8 v dd 2 . |cm l | is the maximum common - mode voltage slew rate that can be sustained while maintaining v o > 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges.
data sheet adum210n rev. 0 | page 5 of 15 table 4 . total supply current vs. data throughput 3.3 v operation 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current supply cur rent side 1 i dd1 2.2 3.5 2.4 3.6 3.2 4.6 ma supply current side 2 i dd2 0.9 1.5 1. 4 2.0 2.8 4.3 ma electrical character istics 2.5 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 2.5 v. minimum/maximum specifications apply over the entire recommended operation range: 2.25 v v dd1 2.75 v, 2.25 v v dd2 2.75 v, ? 40c t a + 125c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. supply currents are specified with 50% duty cycle signals. table 5 . parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pwd limit data rate 150 mbps within pwd limit propagation delay t phl , t plh 5.0 7.0 14 ns 50% input to 50% output pulse width distortion pwd 0.7 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/ c propagation delay skew t psk 7.0 ns between any two units at the same temperature, voltage, and load jitter 320 ps p -p s ee the jitter measurement section 65 ps rms s ee the jitter measurement section dc specifications input threshold logic high v ih 0.7 v dd1 v logic low v il 0.3 v dd1 v output voltage logic high v oh v dd2 ? 0.1 v dd2 v i o = ?20 a, v i = v ih v dd 2 ? 0.4 v dd 2 ? 0.2 v i o = ?2 ma, v i = v ih logic low v ol 0.0 0.1 v i o = 20 a, v i = v il 0.2 0.4 v i o = 2 ma, v i = v il input current per channel i i ?10 +0.01 +10 a 0 v v i v dd 1 quiescent supply current i dd 1 (q) 0.8 1.1 ma v i = 0 (n 0), 1 ( n 1) 1 i dd 2 (q) 0.9 1.2 ma v i = 0 ( n 0), 1 ( n 1) 1 i dd 1 (q) 3.5 5.6 ma v i = 1 ( n 0), 0 ( n 1) 1 i dd 2 (q) 1.0 1.2 ma v i = 1 ( n 0), 0 ( n 1) 1 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs switching, 50% duty cycle dynamic output i ddo (d) 0.01 ma/mbps inputs switching, 50% duty cycle undervoltage lockout uvlo positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 2 |cm h | 75 100 kv/s v i = v dd 1 , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v i = 0 v, v cm = 1000 v, transient magnitude = 800 v 1 n 0 indicates the adum210n0 model s and n1 indicates the adum210n1 models . see the ordering guide . 2 |cm h | is the maximum common - mode voltage slew rate that can be sustained while maintaining the voltage output (v o ) > 0.8 v dd2 . |cm l | is the maximum common - mode voltage slew rate that can be sustai ned while maintaining v o > 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges.
adum210n data sheet rev. 0 | page 6 of 15 table 6 . total supply current vs. data throughput 2.5 v operation 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current supply current side 1 i dd1 2.2 3. 4 2.4 3.6 3.2 4.3 ma supply current side 2 i dd2 0 . 9 1.4 1. 3 1. 8 2. 3 3.5 ma electrical character istics 1.8 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 1.8 v. minimum/maximum specifications apply over the entire recommended operation range: 1.7 v v dd1 1.9 v, 1.7 v v dd2 1.9 v, and ? 40c t a + 125c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. supply curr ents are specified with 50% duty cycle signals. table 7 . parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pwd limit data rate 150 mbps within pwd limit propagation delay t phl , t plh 5.8 8.7 15 ns 50% input to 50% output pulse width distortion pwd 0.7 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/ c propagation delay skew t psk 7.0 ns between any two units at the same temperature, voltage, and load jitter 630 ps p -p s ee the jitter measurement section 190 ps rms s ee the jitter measurement section dc specifications input threshold logic high v ih 0.7 v dd1 v logic low v il 0.3 v dd1 v output voltage logic high v oh v dd2 ? 0.1 v d d2 v i o = ?20 a, v i = v ih v dd 2 ? 0.4 v dd 2 ? 0.2 v i o = ?2 ma, v i = v ih logic low v ol 0.0 0.1 v i o = 20 a, v i = v il 0.2 0.4 v i o = 2 ma, v i = v il input current per channel i i ?10 +0.01 +10 a 0 v v i v dd 1 quiescent supply current i dd 1 (q) 0.7 1.1 ma v i = 0 (n 0), 1 ( n1 ) 1 i dd 2 (q) 0.9 1.2 ma v i = 0 ( n 0), 1 ( n1 ) 1 i dd 1 (q) 3.4 5.4 ma v i = 1 ( n 0), 0 ( n1 ) 1 i dd 2 (q) 0.9 1.2 ma v i = 1 ( n 0), 0 ( n 1) 1 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs switching, 50% duty cycle dynamic output i ddo (d) 0.01 ma/mbps inputs switching, 50% duty cycle undervoltage lockout uvlo positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 2 |cm h | 75 100 kv/s v i = v dd 1 , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v 1 = 0 v, v cm = 1000 v, transient magnitude = 800 v 1 n 0 indicates the adum210n0 model s and n1 indicates the adum210n1 models . see the ordering guide . 2 |cm h | is the maximum common - mode voltage sle w rate that can be sustained while maintaining the voltage output (v o ) > 0.8 v dd2 . |cm l | is the maximum common - mode voltage slew rate that can be sustained while maintaining v o > 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges.
data sheet adum210n rev. 0 | page 7 of 15 table 8 . total supply current vs. data throughput 1.8 v operation 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current supply current side 1 i dd1 2.1 3.1 2.3 3.4 3.0 4. 2 ma supply current side 2 i dd2 0.9 1.2 1. 2 1.6 2. 2 3.2 ma insulation and safet y related specificat ions for additional information, see www.analog.com/icouplersafety . table 9 . parameter symbol value unit test conditions/comments rated dielectric insulation voltage 5 000 v rms 1 - minute duration minimum external air gap (clearance) l (i01) 8 .0 mm min measured from input terminals to output terminals, shortest distance through air minimum external tracking (creepage) l (i02) 8 .0 mm min measured from input terminals to output terminals, shortest distance path along body minimum clearance in the plane of the printed circuit board (pcb clearance) l (pcb) 8 . 3 mm min meas ured from input terminals to output terminals, shortest distance through air, line of sight, in the pcb mounting plane minimum internal gap (internal clearance) 25.5 m min insulation distance through insulation tracking resistance (comparative tracking index) cti >400 v din iec 112/vde 0303 part 1 material group ii material group (din vde 0110, 1/89, table 1) package characterist ics table 10. parameter symbol min typ max unit test conditions/comments resistance (input to output) 1 r i - o 10 13 ? capacitance (input to output) 1 c i - o 2 pf f = 1 mhz input capacitance 2 c i 4.0 pf ic junction to ambient thermal resistance ja 8 0 c/w thermocouple located at center of package underside 1 the adum2 10n is considered a 2 - terminal device: pin 1 through pin 4 are shorted together, and pin 5 through pin 8 are shorted together. 2 input capacitance is from any input data pin to ground. regulatory informati on see table 15 and the insulation lifetime section for details regarding recommended maximum working voltages for specific cross - isolation waveforms and insulation levels. table 11. ul (pending) csa (pending) vde (pending) cqc (pending) recognized under 1577 component recognition program 1 approved under csa component acceptance notice 5a certified according to din v vde v 0884 - 10 (vde v 0884 - 10):2006 - 12 2 certified by cqc11 - 471543 - 2012 single protection, 5 000 v rms isolation voltage csa 60950 - 1 - 07+a1+a2 and iec 60950 - 1, second edition , +a1+a2 basic insulation , 849 v peak, v iosm = 16,000 v peak gb4943.1 - 2011 basic insulation at 800 v rms (1131 v peak) double protection, 5000 v rms isolation voltage reinforced insulation at 400 v rms (565 v peak) iec 60601 - 1 edition 3.1 reinforced insulation, 849 v peak, v iosm = 10,000 v peak basic insulation at 800 v rms (1131 v peak) r einforced insulation at 400 v rms (565 v peak) basic insulation (1mopp), 500 v rms (707 v peak) reinforced insulation (2mopp), 250 v rms ( 1414 v peak) csa 61010 - 1 - 12 and iec 61010- 1 third edition basic insulation at: 300 v rms m ain s, 800 v secondary (1089 v peak) reinforced insulation at : 300 v rms m ains, 400 v secondary (565 v peak) file e214100 file 205078 file 2471900 - 4880 - 0001 file (pending) 1 in accordance with ul 1577, e ach adum2 10n is proof tested by applying an insulation test voltage 45 0 0 v rms for 1 sec . 2 in accordance with din v vde v 0884- 10 , each adum2 10n is proof tested by applying a n insulation test voltage 1592 v peak for 1 sec (partial discharge detection limit = 5 pc). the * marking branded on the component designa tes din v vde v 0884 - 10 approval.
adum210n data sheet rev. 0 | page 8 of 15 din v vde v 0884 - 10 (vde v 0884 - 10) insulation character istics this isolator is suitable for reinforced electrical isolation only within the safety limit data. protective circuits ensure the maintenance of the safety data. the * marking on packages denotes din v vde v 0884 - 10 approval. table 12. description t est conditions/comments symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 150 v rms i to iv for rated mains voltage 300 v rms i to iii for rated mains voltage 400 v rms i to iii climatic classification 40/ 10 5/21 pollution degree per din vde 0110, table 1 2 maximum working insulation voltage v iorm 849 v peak input to output test voltage, method b1 v iorm 1.875 = v pd (m) , 100% production test, t ini = t m = 1 sec, partial discharge < 5 pc v pd (m) 1 592 v peak input to output test voltage, method a after environmental tests subgroup 1 v iorm 1.5 = v pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc v pd (m) 1274 v peak after input and/or safety test subgroup 2 and subgroup 3 v iorm 1.2 = v pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc 1019 v peak highest allowable overvoltage v iotm 700 0 v peak surge isolation voltage v iosm basic v peak = 16 .0 kv , 1.2 s rise time, 50 s, 50% fall time 16, 000 v peak reinforced v peak = 16 .0 kv, 1.2 s rise time, 50 s, 50% fall time 10, 000 v peak safety limiting values maximum value allowed in the event of a failure (see figure 2 ) maximum junction temperature t s 150 c total power dissipation at 25c p s 0.98 w insulation resistance at t s v io = 500 v r s >10 9 ? 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 50 100 150 200 safe limiting power (w) ambient temperature (c) 13969-002 figure 2. t hermal derating curve, dependence of safety limiting values with ambient temperature per din v vde v 0884 - 10 recommended operatin g conditions table 13. parameter sy mbol rating operating temperature t a ?40c to +125c supply voltages v dd1 , v dd2 1.7 v to 5.5 v input signal rise and fall times 1.0 ms
data sheet adum210n rev. 0 | page 9 of 15 absolute maximum rat ings t a = 25 c, unless otherwise noted. table 14. parameter rating storage temperature (t st ) range ?65c to +150c ambient operating temperature (t a ) range ?40c to +125c supply voltage s (v dd1 , v dd2 ) ?0.5 v to +7.0 v input voltage (v i ) ?0.5 v to v ddi 1 + 0.5 v output voltage (v o ) ?0.5 v to v ddo 2 + 0.5 v average output current per pin 3 side 2 output current (i o2 ) ?10 ma to +10 ma common - mode transients 4 ?150 kv/s to +150 kv/s 1 v ddi is the input side supply voltage. 2 v ddo is the output side supply voltage. 3 see figure 2 for the maximum rated current values for various temperatures. 4 common - m ode t ransients r efers to the common - mode transients across the insulation barrier. common - mode transients exceeding the absolute maximum ratings may cause latch - up or permanent damage. stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. esd caution table 15. maximum continuous working voltage 1 parameter rating constraint ac voltage bipolar waveform basic insulation 849 v peak 50 - year minimum insulation lifetime reinforced insulation 789 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950 - 1 2 unipolar waveform basic insulation 1698 v peak 50- year minimum insulation lifetime reinforced insulation 849 v peak 50- year minimum insulation lifetime dc voltage basic insulation 1118 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950 - 1 2 reinforced insulation 558 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950 - 1 2 1 maximum c ontinuous w orking v oltage r efers to the continuous voltage magnitude imposed across the isolation barrier. see the insulation lifetime section for more details. 2 insulation lifetime for the specified test condition is greater than 50 years . truth table table 16 . truth table (positive logic) v i input 1 v ddi state v dd2 state default low (n0), v o output 2 default high (n1), v o output 2 test conditions/ comments l ow powered powered l ow l ow normal operation h igh powered powered h igh h igh normal operation x 3 unpowered powered l ow h igh fail - safe output x 3 powered unpowered indeterminate indeterminate 1 x means dont care . 2 n 0 indicates the adum210n0 model s and n1 indicates the adum210n1 models . see the ordering guide . 3 input pins (v i ) on the same side as an unpowered supply must be in a low state to avoid powering the device through its esd protection circuitry.
adum210n data sheet rev. 0 | page 10 of 15 pin configuration and fu nction descriptions v dd1 1 1 v i 2 v dd1 1 3 gnd 1 4 v dd2 8 gnd 2 2 7 v o 6 gnd 2 2 5 adum210n top view (not to scale) 1 pin 1 and pin 3 are internally connected. either or both may be used for v dd1 . 2 pin 5 and pin 7 are internally connected. either or both may be used for gnd 2 . 13969-004 figure 3. pin configuration table 17. pin function descriptions 1 pin no. mnemonic description 1 v dd1 supply voltage for isolator side 1. pin 1 and pin 3 are internally connected. either or both may be used for v dd1 . 2 v i logic input. 3 v dd1 supply voltage for isolator side 1. pin 1 and pin 3 are internally connected. either or both may be used for v dd1 . 4 gnd 1 ground 1. ground reference for isolator side 1. 5 gnd 2 ground 2. ground reference for isolator side 2. pin 5 and pin 7 are internally connected. either or both may be used for gnd 2 . 6 v o logic output. 7 gnd 2 ground 2. ground reference for isolator side 2. pin 5 and pin 7 are internally connected. either or both may be used for gnd 2 8 v dd2 supply voltage for isolator side 2. 1 reference the an-1109 application note for specific layout guidelines.
data sheet adum210n rev. 0 | page 11 of 15 typical performance characteristics 5 0 1 2 3 4 0 20 40 60 80 100 120 140 160 i dd1 total supply current (ma) data rate (mbps) 5v 3.3v 2.5v 1.8v 13969-012 figure 4. i dd1 total supply current vs. data rate at various voltages 5 0 1 2 3 4 0 20 40 60 80 100 120 140 160 i dd2 total supply current (ma) data rate (mbps) 5v 3.3v 2.5v 1.8v 13969-013 figure 5. i dd2 total supply current vs. data rate at various voltages 14 12 10 8 6 4 2 0 ?40 14012010080604020 0 ?20 propagation delay, t plh (ns) temperature (c) 5v 3.3v 2.5v 1.8v 13969-014 figure 6. propagation delay, t plh vs. temperature at various voltages 14 12 10 8 6 4 2 0 ?40 14012010080604020 0 ?20 propagation delay, t phl (ns) temperature (c) 5v 3.3v 2.5v 1.8v 13969-015 figure 7. propagation delay, t phl vs. temperature at various voltages
adum210n data sheet rev. 0 | page 12 of 15 applications information overview the adum210n uses a high frequency carrier to transmit data across the isolation barrier using i coupler chip scale transformer coils separated by layers of polyimide isolation. with an on/off keying (ook) technique and the differential architecture shown in figure 9 and figure 10, the adum210n has very low propagation delay and high speed. internal regulators and input/output design techniques allow logic and supply voltages over a wide range from 1.7 v to 5.5 v, offering voltage translation of 1.8 v, 2.5 v, 3.3 v, and 5 v logic. the architecture is designed for high common- mode transient immunity and high immunity to electrical noise and magnetic interference. radiated emissions are minimized with a spread spectrum ook carrier and other techniques. figure 9 shows the waveforms for the adum210n0 models, which have the condition of the fail-safe output state equal to low, where the carrier waveform is off when the input state is low. if the input side is off or not operating, the fail-safe output state of low (noted by a 0 in the model number) sets the output to low. for the adum210n1 models, which have a fail-safe output state of high, figure 10 shows the conditions where the carrier waveform is off when the input state is high. when the input side is off or not operating, the fail-safe output state of high (noted by a 1 in the model number) sets the output to high. see the ordering guide for the model numbers that have the fail-safe output state of low or the fail-safe output state of high. pcb layout the adum210n digital isolator requires no external interface circuitry for the logic interfaces. power supply bypassing is strongly recommended at the input and output supply pins (see figure 8). bypass capacitors are most conveniently connected between pin 1 and pin 4 for v dd1 and between pin 5 and pin 8 for v dd2 . the recommended bypass capacitor value is between 0.01 f and 0.1 f. the total lead length between both ends of the capacitor and the input power supply pin must not exceed 10 mm. v dd1 v dd1 v ia gnd 1 v dd2 v oa gnd 2 gnd 2 13969-005 figure 8. recommended printed circuit board layout in applications involving high common-mode transients, ensure that board coupling across the isolation barrier is minimized. furthermore, design the board layout such that any coupling that does occur equally affects all pins on a given component side. failure to ensure this can cause voltage differentials between pins exceeding the absolute maximum ratings of the device, thereby leading to latch-up or permanent damage. see the an-1109 application note for pcb layout guidelines. transmitter gnd 1 gnd 2 v in v out receiver regulator regulator 13969-007 figure 9. operational block diagram of a single channel with a low fail-safe output state transmitter gnd 1 gnd 2 v in v out receiver regulator regulator 13969-008 figure 10. operational block diagram of a single channel with a high fail-safe output state
data sheet adum210n rev. 0 | page 13 of 15 propagation delay related parameters propagation delay is a parameter that describes the time it takes a logic signal to propagate through a component. the propagation delay to a logic 0 output may differ from the propagation delay to a logic 1 output. input ( v i ) output (v o ) t plh t phl 50% 50% 13969-009 figure 11. propagation delay parameters pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the timing of the input signal is preserved. propagation delay skew is the maximum amount the propagation delay differs between multiple adum210n components operating under the same conditions. jitter measurement figure 12 shows the eye diagram for the adum210n . the measurement was taken using an agilent 81110a pulse pattern generator at 150 mbps with pseudorandom bit sequences (prbs) 2(n ? 1), n = 14, for 5 v supplies. jitter was measured with the tektronix model 5104b oscilloscope, 1 ghz, 10 gs/sec with the dpojet jitter and eye diagram analysis tools. the result shows a typical measurement on the adum210n with 380 ps p-p jitter. 10 5 0 1 2 3 4 vol t age (v) 5 0 time (ns) ?5 ?10 13969-010 figure 12. eye diagram insulation lifetime all insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. the rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation as well as on the materials and material interfaces. the two types of insulation degradation of primary interest are breakdown along surfaces exposed to the air and insulation wear out. surface breakdown is the phenomenon of surface tracking, and the primary determinant of surface creepage requirements in system level standards. insulation wear out is the phenomenon where charge injection or displacement currents inside the insulation material cause long-t erm insulation degradation. surface tracking surface tracking is addressed in electrical safety standards by setting a minimum surface creepage based on the working voltage, the environmental conditions, and the properties of the insulation material. safety agencies perform characterization testing on the surface insulation of components that allows the components to be categorized in different material groups. lower material group ratings are more resistant to surface tracking and, therefore, can provide adequate lifetime with smaller creepage. the minimum creepage for a given working voltage and material group is in each system level standard and is based on the total rms voltage across the isolation, pollution degree, and material group. the material group and creepage for the adum210n isolators are presented in table 9. insulation wear out the lifetime of insulation caused by wear out is determined by its thickness, material properties, and the voltage stress applied. it is important to verify that the product lifetime is adequate at the application working voltage. the working voltage supported by an isolator for wear out may not be the same as the working voltage supported for tracking. it is the working voltage applicable to tracking that is specified in most standards. testing and modeling show that the primary driver of long-term degradation is displacement current in the polyimide insulation causing incremental damage. the stress on the insulation can be broken down into broad categories, such as dc stress, which causes very little wear out because there is no displacement current, and an ac component time varying voltage stress, which causes wear out. the ratings in certification documents are usually based on 60 hz sinusoidal stress because this reflects isolation from line voltage. however, many practical applications have combinations of 60 hz ac and dc across the barrier as shown in equation 1. because only the ac portion of the stress causes wear out, the equation can be rearranged to solve for the ac rms voltage, as is shown in equation 2. for insulation wear out with the polyimide materials used in these products, the ac rms voltage determines the product lifetime. 22 dc rmsac rms vvv ?? (1) or 2 2 dc rms rmsac vv v ?? (2) where: v rms is the total rms working voltage. v ac rms is the time varying portion of the working voltage. v dc is the dc offset of the working voltage.
adum210n data sheet rev. 0 | page 14 of 15 calculation and use of parameters example the following example frequently arises in power conversion applications. assume that the line voltage on one side of the isolation is 240 v ac rms and a 400 v dc bus voltage is present on the other side of the isolation barrier. the isolator material is polyimide. to establish the critical voltages in determining the creepage, clearance and lifetime of a device, see figure 13 and the following equations. isol a tion vol t age time v ac rms v rms v dc v peak 13969-011 figure 13. critical voltage example the working voltage across the barrier from equation 1 is v rms = 22 dc rmsac vv ? v rms = 2 2 400C240 v rms = 466 v this is the working voltage used together with the material group and pollution degree when looking up the creepage required by a system standard. to determine if the lifetime is adequate, obtain the time varying portion of the working voltage. to obtain the ac rms voltage, use equation 2. 2 2 C dc rms rmsac vv v ? 2 2 400C466 ? rms ac v v ac rms = 240 v rms in this case, the ac rms voltage is simply the line voltage of 240 v rms. this calculation is more relevant when the waveform is not sinusoidal. the value is compared to the limits for working voltage in table 15 for the expected lifetime, less than a 60 hz sine wave, and it is well within the limit for a 50-year service life. note that the dc working voltage limit in table 15 is set by the creepage of the package as specified in iec 60664-1. this value can differ for specific system level standards.
data sheet adum210n rev. 0 | page 15 of 15 outline dimensions 09-17-2014-b 8 5 4 1 seating plane coplanarity 0.10 1.27 bsc 1.04 bsc 6.05 5.85 5.65 7.60 7.50 7.40 2.65 2.50 2.35 0.75 0.58 0.40 0.30 0.20 0.10 2.45 2.35 2.25 10.51 10.31 10.11 0.51 0.41 0.31 pin 1 mark 8 0 0.33 0.27 0.20 0.75 0.50 0.25 45 figure 14. 8-lead standard small outline package, with increased creepage [soic_ic] wide body (ri-8-1) dimensions shown in millimeters ordering guide model 1 temperature range no. of inputs, v dd1 side no. of inputs, v dd2 side withstand voltage rating (kv rms) fail-safe output state package description package option ADUM210N1BRIZ ?40c to +125c 1 0 5.0 high 8-lead soic_ic ri-8-1 ADUM210N1BRIZ-rl ?40c to +125c 1 0 5.0 high 8-lead soic_ic ri-8-1 adum210n0briz ?40c to +125c 1 0 5.0 low 8-lead soic_ic ri-8-1 adum210n0briz-rl ?40c to +125c 1 0 5.0 low 8-lead soic_ic ri-8-1 1 z = rohs compliant part. ?2016 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d13969-0-4/16(0)

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